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[Basics Of Design]
Evaluate Platform ASIC Options To Match The Best Silicon To Your Application
Sponsored by: LSI LOGIC CORP.


Dave Bursky  |   ED Online ID #11303  |   November 7, 2005


When it comes to platform ASICs, designers have a wide range of options. Platform and structured ASIC solutions offer faster time-to-market and lower development costs than full cell-based ASIC designs. Additionally, they deliver more performance than high-density field-programmable gate arrays (FPGAs). Of course, you must evaluate your specific system needs and choose a platform ASIC accordingly.

Platform and structured ASICs have established themselves as attractive implementation options between custom-crafted cell-based ASICs and off-the-shelf FPGAs in terms of cost, performance, and complexity. These partially prefabricated chips can considerably reduce the mask costs and verification time and cost compared to a cell-based ASIC. They also can deliver higher performance and smaller chip sizes (and lower silicon costs) than high-density FPGAs.

Platform ASICs represent the higher end of this market segment. They tend to have more features than structured ASICs, offering more pre-integrated functionality in the form of multigigabit serializer/deserializers (SERDES), large amounts of embedded memory, phase-locked loops, and other functions.

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