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EDA Alert e-Newsletter
Electronic Design - www.elecdesign.com
January 10, 2006
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Today's Table of Contents:
1. Viewpoint Exclusive -- A Modest Proposal
2. Peripheral-IP Catalog Supports Emulation Platform
3. Matlab-To-C Conversions Now Made Automatically
4. Book Review: HDL Programming Fundamentals
5. Power-Aware Reference Flow Arrives For 130 nm And Below
6. Happenings
- ASP-DAC 2006
- DesignCon 2006
- DVCon '06
- FPGA '06
- ISQED '06
- DATE '06
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TAKE A POLL: How do you see your career path changing in 2006?
-- I'm looking for a new engineering job
-- I'd like to move into management
-- I might start my own firm or consulting business
-- No change, I love my career as is
-- I'm thinking about leaving the engineering field
Electronic Design's Quick Poll ==> http://news.electronicdesign.com/t?ctl=15275:484C79
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Give us your view and we may give you a t-shirt!
Take our short "Industry Barometer" online survey to give us your
unique view of the electronics industry. Five minutes is all it
takes to answer eight short questions and get entered to win one of
five stylish Electronic Design t-shirts.
Go to http://news.electronicdesign.com/t?ctl=1D5D4:484C79
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1. Viewpoint -- Exclusive to EDA Alert
************
A Modest Proposal
George Harper, Vice President of Marketing
Bluespec Inc., Waltham, Mass.
For Preventing Companies from Being Further Burdened by Spiraling
ASIC and FPGA Development Costs, and For Making Superfluous
Engineers Beneficial to the Public
Whilst relaxing in my winged-back chair one evening, pipe in hand,
loyal Irish setter at foot, and perusing Jonathan Swift's A Modest
Proposal, it occurred to me what a melancholy object it is to those
who walk through this country to see the streets bustling with
hardware design engineers seeking an honest livelihood, forced to
rummage for a place to park their abundant talent and experience...
Read the complete story at:
Viewpoint ==>
http://news.electronicdesign.com/t?ctl=1D5D5:484C79
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Archived Web Seminar: RoHS/WEEE -- The Manager's Role, Part 2
Is the industry ready to comply with the European Union's
Restrictions on Hazardous Substances (RoHS) and Waste Electrical &
Electronic Equipment (WEEE) directives? Several surveys suggest it
is not. While there's still a great deal of work to be done on the
technical side, corporate-level and engineering managers are still
wrestling with cost, communications, and supply-chain issues that
come with meeting the RoHS requirements. Join us for our second Web
seminar looking at the manager's role in the transition to RoHS
compliance. We will identify and explore the decisions that must be
made by industry managers.
View the archive 24/7 at:
http://news.electronicdesign.com/t?ctl=1D708:484C79
39&partnerref=edtxt2
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2. News
*******
Peripheral-IP Catalog Supports Emulation Platform
An assortment of peripheral-IP components for EVE's ZeBu emulation
platform now supports verification of system-on-a-chip (SoC) and
ASIC designs for wireless, graphics/video/multimedia, networking,
and embedded-processor applications. The components are grouped in
three families: synthesizable memory models, transactors, and
hardware bridges.
Verification productivity gets a lift by connecting an SoC or ASIC
design, which is mapped onto the ZeBu hardware platform, to a set of
peripheral components. The ensuing system design then is run at
multi-megahertz speeds at the transaction level and/or in-circuit
emulation. The result is that corner-case bugs in hardware and in
embedded software can be quickly pinpointed and corrected.
The ZeBu Vertical Solution Catalog is shipping now at a starting
price of $5000 per component for a one-year, term-based license.
EVE ==> http://news.electronicdesign.com/t?ctl=1D5D6:484C79
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3. News
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Matlab-To-C Conversions Now Made Automatically
Automatic generation of C++ verification models from Matlab models
is among the key enhancements in the 2006.1 version of AccelChip's
DSP Synthesis tool and AccelWare IP toolkits. The M2C-Accelerator,
an option to the DSP Synthesis tool, eliminates the error-prone
process of manually converting Matlab models to C. As a result,
design teams can develop algorithms faster and explore architectural
variants in less time. The C++ models generated by M2C-Accelerator
can be used in Matlab, Simulink, Xilinx System Generator, and
standalone C verification environments. Pricing for Version 2006.1
of the DSP Synthesis tool starts at $15,000 for a six-month,
time-based license. M2C-Accelerator pricing starts at $5000.
AccelChip ==> http://news.electronicdesign.com/t?ctl=1D5D7:484C79
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4. Book Review
*******
HDL Programming Fundamentals
(VHDL and Verilog)
By Nazeih M. Botros
ISBN: 1584508558
For those who are new to hardware description languages (HDLs), or
looking to refresh dormant skills, Nazeih Botros' HDL Programming
Fundamentals provides a basic course in both VHDL and Verilog. A
slew of books out there takes up either one language or the other.
This book is a bit unusual in that it covers both in parallel....
Read the full book review at:
http://news.electronicdesign.com/t?ctl=1D5D8:484C79
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5. News
*******
Power-Aware Reference Flow Arrives For 130 nm And Below
Sequence Design is developing an advanced power-aware reference flow
with Korea's DongbuAnam Semiconductor Inc., one of the world's
largest pure-play wafer foundries, for 130-nm and below process
technologies. DongbuAnam will make the newly developed power-aware
reference flow jointly developed with Sequence available to its
customers in April.
The Sequence flow addresses a range of critical issues, including
system-on-a-chip (SoC) power analysis and optimization, standby
leakage and dynamic power optimization, and power-grid analysis and
optimization. It incorporates Sequence's power-aware technologies,
including the latest releases of PowerTheater, a complete toolkit
for SoC power analysis and optimization; CoolPower, which provides
physical power optimization for standby leakage power and dynamic
power; and CoolTime for static and dynamic power-grid analysis and
optimization.
DongbuAnam Semiconductor ==> http://news.electronicdesign.com/t?ctl=1D5D9:484C79
Sequence Design ==> http://news.electronicdesign.com/t?ctl=193F4:484C79
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6. Happenings
**************
Asia and South Pacific Design Automation Conference (ASP-DAC 2006)
Pacifico Yokohama, Yokohama City, Japan
January 24-27, 2006
http://news.electronicdesign.com/t?ctl=17FF8:484C79
DesignCon 2006
Santa Clara Convention Center, Santa Clara, Calif.
February 6-9, 2006
http://news.electronicdesign.com/t?ctl=1C43A:484C79
Design And Verification Conference and Exhibition (DVCon '06)
Doubletree Hotel, San Jose, Calif.
February 22-24, 2006
http://news.electronicdesign.com/t?ctl=1C43B:484C79
International Symposium on Field-Programmable Gate Arrays (FPGA '06)
Hyatt Regency Monterey, Monterey, Calif.
February 22-24, 2006
http://news.electronicdesign.com/t?ctl=1C43C:484C79
Design Automation and Test in Europe (DATE '06)
ICM Messe, Munich, Germany
March 6-10, 2006
http://news.electronicdesign.com/t?ctl=1C43D:484C79
International Symposium on Quality Electronic Design (ISQED '06)
Doubletree Hotel, San Jose, Calif.
March 27-29, 2006
http://news.electronicdesign.com/t?ctl=1C43E:484C79
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EDA ALERT e-NEWSLETTER CONTACTS
=========================================
EDA Technology Editor, Electronic Design: David Maliniak
mailto:dmaliniak@penton.com
Advertising/Sponsorship Opportunities: Bill Baumann
mailto:bbaumann@penton.com
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