Electronic Design

  
Reprints     Printer-Friendly    Email this Article    RSS        Font Size     What's This?


[TechView: Digital]
Demo Platform Compares FPGA/CPLD Power

Daniel Harris  |   ED Online ID #14797  |   February 15, 2007


If you've ever wondered which FPGA/CPLD vendor offers the best performance at the lowest power, consider QuickLogic's Power Comparison Resource Package. Along with a corresponding Web site, it includes a video, comparison demo platform, and white paper that help designers compare the power usage and performance of leading FPGAs and CPLDs to choose the best part based on design constraints and requirements.

Written by a third-party consultant, the white paper provides the results of a study based on different architectures using various low-power FPGAs and CPLDs. It offers details on why and when different architectures will consume excessive amounts of power. The data includes in-rush current at device startup together with static, dynamic, and idle-mode power consumption during normal operation.

QuickLogic Corp.
www.quicklogic.com/powerdemo


Reprints   Printer-Friendly  Email this Article  RSS    Font Size   What's This?


  • C Tools Accelerate HDV Development On Xilinx FPGAs
  • A New Design Inflection Point
  • Forecasting Industry Growth For 2009 And Beyond
  • EDA Retools To Exploit Multicore Architectures
  • Design And Verification Move Up In Abstraction
  • EDA Retools To Exploit Multicore Architectures
  • A New Design Inflection Point
  • Design And Verification Move Up In Abstraction
    1) Transportation Guidelines For Lithium Batteries Get Updated
    (1167 views today)
    2) Build A Smart Battery Charger Using A Single-Transistor Circuit
    (261 views today)
    3) WHITE PAPER: Liquid-Level Monitoring Using a Pressure Sensor
    (197 views today)
    4) 1-A Switching Regulators Operate With 96% Efficiency To Replace Linear Regulators
    (127 views today)
    5) The Field Of Energy Harvesting Begins To Ripen
    (109 views today)
    ALL TOP 20



    POST YOUR COMMENTS HERE
    Name:

    Email:
    Your Comments:

    Enter the text from the image below


    Please refresh the page if you have trouble reading this text.

    Search Electronic Design
         
      
     
    Web Seminar
    Sponsored By:
    Title: Read Pacing: A Performance Enhancing Feature of PCI Express Gen 2 Switch Devices
    Speakers: 
    Date: 07/01/08
    Register: 

    Electronic Design Europe Electronic Design China EEPN Power Electronics Auto Electronics Microwaves & RF
    Mobile Dev & Design Schematics Find Power Products Military Electronics EE Events Related Resources