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[Technology Report]
System-On-A-Chip Toolbox Helps Perfect Design Recipe
New SoC building blocks and tools can assist in planning chip designs, buying precious time to add your "special sauce" to the mix.

Daniel Harris  |   ED Online ID #16433  |   September 1, 2007


System design today hinges on two key steps: your ability to adequately select and analyze the available building blocks, and then stirring in the "special sauce" that makes your product unique. The more aware you are of the available building blocks you can trust, the more time you can spend perfecting the flavor of your sauce.

To assist the chef, here's a list of the latest intellectual-property (IP) offerings, the tools to help with the IP selection process, and some recommended reading. Let's start with the most important stage of system-on-a-chip (SoC) recipes: the available ingredients.

RECENT SOCIP INGREDIENTS
There's always a host of new and exciting IP ingredients to discuss. If you're proficient with Google, you can find most of the pre-built IP blocks to assist with preparation of the seven-course SoC meal. A few of this year's IP blocks really stand out.

Faraday Technology's Ultra-Wideband (UWB) Medium Access Controller (MAC) IP solution offers a high transfer rate and low pin count. By integrating Faraday's UWB MAC IP into your SoC design, it's possible to hit over 200 Mbits/s of throughput—double the typical throughput achieved by most of today's application-specific standard-product (ASSP) offerings.

Higher speeds have been achieved with a Peripheral Component Interface (PCI), but also at a higher pin count than what may be available on complex SoC designs. Faraday's solution incorporates an industry-standard MAC-PHY Interface (MPI) for communications between your SoC and an external UWB physical-layer (PHY) IC. For more information on UWB, see "The Year Of Ultra-Wideband" at www.electronicdesign.com, ED Online 12045.

If you require high-density logic, nonvolatile-memory solution IP, consider Kilopass Technology's Extra Permanent Memory (XPM). It's available for 90-nm standard (XPM90G) and low-power (XPM-90LP) CMOS process technology implementations.

The XPM offerings deliver field-programmable memory solutions ideally targeted at digital content protection and digital-rights-management schemes, or other types of applications requiring encryption keys. Further applications include firmware and calibration parameters, hardware configuration, and boot code storage.

Need a PCI Express Gen 2 controller IP block? GDA Technologies' GPEX-2 IP is optimized for latency, link utilization, power consumption, and reliability. It also comes in a small footprint. Target applications include networking and telecommunications with end-point, root complex, switch, and bridge implementations.

GPEX-2 offers a flexible, scalable architecture that's simple to customize. It supports 32-, 64-, and 128-bit data widths, and can be configured with one, two, four, eight, or 16 lanes per link. It's independent of application logic, PHY designs, and target technology. And with PCISIG compliance, this verified solution will get you up and running quickly.

If you're searching for standard CMOS-based IP implementations of, for instance, a pulse-width-modulation controller, an asynchronous sample-rate converter, or a digital-to-analog converter targeted for audio applications, consider Anagram Technologies. This company recently introduced a family of products built using what it calls Digital PureLogic SoC IP.

Based on digital filtering and delta-sigma technology, the family suits low-power applications as well as applications requiring a high level of integration, along with the precise reconstruction of analog signals. The family is fully CMOScompatible, so auto place-and-route software can fully control the layout of any Digital PureLogic IP block.

Such control provides the traditional benefits of minimizing digital noise coupling without the device-matching issues typical of other implementations required to achieve good linearity. Target applications include compact, low-cost, and low-power high-fidelity multimedia; automotive; and consumer products.

For a listing of security-related IP, see "Has Anyone Seen My Data?" at ED Online 15387. For the basics of converting FPGA designs to ASICs, see "Avoid The Bird Flu With Proper FPGA Migration" at ED Online 16143.


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