Electronic Design

  
Reprints     Printer-Friendly    Email this Article    RSS        Font Size     What's This?


[Forefront]
Chirp Modulation Propels Micropower 2.4-GHz ISM Wireless Transceiver

Roger Allan  |   ED Online ID #1762  |   December 9, 2002


By applying a chirp spread-spectrum technique to multidimensional-multiple-access (MDMA) modulation, scientists at Nanotron Technologies of Berlin, Germany, produced an optimized single-chip transceiver for wireless communications in the 2.45-GHz ISM (Industrial, Scientific and Medical) band.

The silicon-germanium (SiGe) implementation yields a highly sensitive IC, with less than -92 dBm at a bit-error rate of 10-3. This short-distance IC also operates up to 600 m indoors and 700 m outdoors. It requires very low power, typically 1 µA and a maximum of 4 µA in standby, so battery operation can last for several years from a small cell. The 0.35-µm SiGe biCMOS chip takes up just 10 mm2 of die area as well.

Chirp impulses are linear FM signals with constant amplitude that resist transmission disturbances. MDMA modulation combines amplitude, frequency, and phase to exploit the best performances of all three for applications with medium data rates and extremely low power.

Sync impulses that provide a small bandwidth-time (BT) product deal with signals at the transmitter and receiver. Once out of the transmitter, signals are "chirped" to obtain a large BT product. Two dispersive delay lines are located at the transmission and reception end points (Fig. 1).

The mixed-signal nanoNET TRX transceiver's baseband media-access controller (MAC) provides a minimum data rate of 2 Mbits/s. It supports four modulation modes (up-chirp/null, down-chirp/null, folded chirp, and quaternary chirp) and includes a 4-bit programmable port and a four-channel analog-to-digital converter (ADC) (Fig. 2). Also, it runs from an unregulated 2.38 to 3.6 V.

The chip will be housed in a 7- by 7-mm 48-pin MLF package. A demonstration board is available now, with samples arriving in February 2003. Evaluation boards will be available in April 2003. In 100,000-unit lots, the chip will cost 7.5 Euros ($7.33 U.S.), going down to 5 Euros ($4.88 U.S.) for a CMOS version in 2005.

For details, call +49 30 399 954-137 or go to www.nanotron.com.


Reprints   Printer-Friendly  Email this Article  RSS    Font Size   What's This?


  • In EDA, A Year Of Mergers, Failed And Otherwise
  • 2008 BEST Electronic Design Winners
  • Engineers Rely On Internet For Product Info
  • Rochester Electronics Establishes New Design and Technology Group
  • November 17, 2008
  • Custom Sources Light Way To 22-nm IC Lithography
  • Software Turns Scopes Into Vector RF Signal Analyzers
  • Couple’s $15 Million Gift Advances Rice Engineering Education
    1) Build A Smart Battery Charger Using A Single-Transistor Circuit
    (264 views today)
    2) Ten Top Design Skills For Tough Times
    (197 views today)
    3) Consumer Electronics Series: AMD Live! Home Cinema Platform
    (188 views today)
    4) Easily Convert Decimal Numbers To Their Binary And BCD Formats
    (163 views today)
    5) FPGA Costs Half A Buck
    (109 views today)
    ALL TOP 20



    POST YOUR COMMENTS HERE
    Name:

    Email:
    Your Comments:

    Enter the text from the image below


    Please refresh the page if you have trouble reading this text.

    Search Electronic Design
         
      
     
    Email Newsletter
    Sponsored By:
    Electronic Design UPDATE provides readers with late-breaking news, opinions from industry experts, and timely technology stories. It's a unique opportunity to get your product message in front of engineers, engineering managers, and corporate managers while they're reading about critical information online.

    Enter Email to Subscribe
      

    Electronic Design Europe Electronic Design China EEPN Power Electronics Auto Electronics Microwaves & RF
    Mobile Dev & Design Schematics Find Power Products Military Electronics EE Events Related Resources