EDA Alert Update: Among Design Constraints, Power Assumes The Throne
EDA Alert e-Newsletter | January 22, 2008
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Among Design Constraints, Power Assumes The Throne
By David Maliniak, EDA Technology Editor
Over the past few years, the "power problem" has registered more strongly on the radars of system design teams. Portable and handheld consumer electronics keep shrinking, and hence so do their batteries. In 2008, it's all about power for EDA, in terms of tools, methodologies, and even standards. There will be a spate of announcements having to do with low-power design in the next year or two spanning all those areas...
Webcast: Optimize Low-Power Design Mentor Graphics Jon McDonald, TME, will discuss gains to design low-power SoC at levels of abstraction above RTL and look at how tools and methodologies are evolving to suit optimizing for power. Discuss IP reuse concepts enabling designers to build TLM SoC platforms accommodating accurate power assessment and power optimization. Registration Feb 13 at 2:00pm EST
news
DFM Add-On Bolsters PCB Layout Tool
For users of Sunstone Circuits' PCB prototyping services, a design-for-manufacturing (DFM) add-on to CadSoft's Eagle PCB layout tool leverages the tool's built-in design rule-checking engine to ensure that designs conform to Sunstone's requirements. The add-on is offered as a complimentary service to Sunstone customers.
Functional Verification Tool Gains Link To SystemVerilog Assertions
With the addition of a standard assertion-language link, the 360 Module Verifier (360 MV), a functional verification environment, is equipped to fully leverage both SystemVerilog assertions and Open Verification Library assertions.
Physical Synthesis Readied For Altera's Stratix III FPGAs
The first physical synthesis tool with support for Altera's Stratix III family of FPGAs is now available. Mentor's Precision RTL Plus synthesis suite has been benchmarked by Altera as providing performance gains of over 8% compared with Mentor's Precision Synthesis tool.
A strategic alliance between EVE and CoWare ties together the former's accelerated hardware/software co-verification with the latter's SystemC virtual platforms, reducing overall development time for multicore/multi-application SoCs.
Low Level Measurements Handbook The sixth edition of Keithley's Low Level Measurements Handbook covers the fundamentals of precision DC current, voltage, and resistance measurements with a section devoted to common low level measurement applications. Also included is an instrument selection guide as well as a measurement troubleshooting guide, a glossary of terms, as well as important safety considerations. Download your free copy now!
quick poll
With the presidential campaign under way, how do you feel about electronic voting machines?
--Very confident: Electronic voting is the way to go. --Somewhat confident: Anything is better than hanging chads. --Not confident: Security needs to be improved.
I can hear some of you asking the question already: "VHDL? That's still around?" For those coming to VHDL for the first time, it might not be the best starting place. But for those users who are already familiar with the language, this is an ideal source for "the new stuff" in VHDL-2008.
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