The highest demand and the most vigorous competition between companies that make analog-todigital converters (ADCs) lie in the sampling range from 50 to 65 Msamples/s in 10- and 12-bit resolutions. Market demand is highest for eight- and 10-channel devices with the lowest possible power consumption per channel.
In late January, within days of each other, Texas Instruments and National Semiconductor announced groundbreaking new chips for that market segment. In terms of wow-factor, National took some of the wind out of TI’s sails by developing its chip in an entirely new architecture for commercial applications: continuous-time delta-sigma.
Partly due to the new architecture, there was a dramatic development. Where TI had announced chips that use 30% less power than their closest competitor (of the week before), National’s chips use 30% less power again.
TI’s 12-bit ADS5281 (50 Msamples/s), 12-bit ADS5282 (65 Msamples/s), and 10-bit ADS5287 (65 Msamples/s) cost $60.00, $68.40, and $40.00 in lots of 100, but only the ADS5281 was available for sampling as of late January. Sampling now, National’s 12-bit, 50-Msample/s ADC12EU050 costs $64.00 in 1000-unit quantities.
HEAD TO HEAD TI’s chips offer scalable power dissipation that ranges from 48 mW/channel at 30 Msamples/s to 55 mW at 40 Msamples/s; 64 mW at 50 Msamples/s; and 77 mW at 65 Msamples/s (see the figure). Their signal-to-noise ratio (SNR) is 70 dBFS at a 10-MHz intermediate frequency (IF). They come in a 9- by 9-mm, 64-pin quad flat nolead (QFN) package.
According to National Semiconductor, the ADC12EU050 offers a typical per-channel power consumption of 40 mW at 40 Msamples/s and 44 mW at 50 Msamples/s. Its SNR is 70 dBFS at a 3.5-MHz IF. The chip comes in a 68-pin, 10- by 10-mm leadless leadframe package (LLP).
Special features in the TI chips accommodate the different needs of the applications they target. A low-frequency noise-suppression mode eliminates 1/f (flicker) noise, improving SNR by up to 4.2 dB over a 1-MHz band in baseband and time-domain applications. Particularly in ultrasound applications, where an implanted bit of metal in a body can provide a much stronger echo than bone or soft tissue, overload-recovery circuitry allows each of TI’s ADCs to provide valid data within one clock cycle after an input overload as high as 6 dB. At the other end of the signal-strength spectrum, 0- to 12-dB programmable gain boosts input signals as low as 0.5 V p-p to improve dynamic range. TI’s chips also have a companion eight-channel amplifier, the VCA8500, expressly for medical-imaging applications.
Some of the National ADC12EU050’s special features take advantage of the oversampling architecture. Thanks to its integrated low-pass, brick-wall anti-aliasing filter, no external anti-aliasing filter is necessary. The continuoustime architecture also means the IC has an easy-to-drive, purely resistive input stage that, of course, does not require a sample-and-hold amplifier.
National has overcome the continuous-time architecture’s traditional susceptibility to clock jitter with an integrated phase-locked loop (PLL) and voltage-controlled oscillator (VCO) for clock conditioning. Like the TI converters, the National devices provide on-chip instant-overload recovery circuitry that recovers from saturation within one clock cycle if the input exceeds pre-determined limits.
In both cases, these parts are just beginning to sample. Datasheets are still only a few pages long. Additionally, most characteristics are “typical.” (The Texas Instruments datasheet does include some guaranteed minimums.) Any design team working on a project that might use one or the other will likely be in touch with both companies and their application-support engineers.
WHENCE CONTINUOUS TIME? Check out “A Continuous-Time S-? Modulator with 88dB Dynamic Range and 1.1MHz Signal Bandwidth” by Shouli Yan of the University of Texas and Edgar Sánchez-Sinencio of Texas A&M. Presented at the 2003 International Solid State Circuits Conference, it’s available at http://users.ece.utexas.edu/~slyan/data/yan_isscc03.pdf.
In a nutshell, a continuous-time converter moves the sampling operation from the input to the ADC to just after the forward loop filter in the delta-sigma modulator. (Analog Devices claims trademark rights to the term “Sigma-Delta.” Electronic Design uses the term “delta-sigma” in reference to non-ADI oversampling ADCs.)
Please refresh the page if you have trouble reading this text.
Search Electronic Design
Email Newsletter
Sponsored By:
Electronic Design UPDATE provides readers with late-breaking news, opinions from industry experts, and timely technology stories. It's a unique opportunity to get your product message in front of engineers, engineering managers, and corporate managers while they're reading about critical information online.
Reprints
