[Design Application]
Give Your Digital System A Power Boost
To efficiently distribute power, employ the required capacitors, but don’t overlook the pc board itself as part of the overall decoupling design.
Engineers designing pc-board power-distribution systems begin by dividing the design into four parts: the power source (battery, converter, or regulator), the pc board, a board decoupling capacitor, and a chip decoupling capacitor. This article focuses on the second and fourth items. Generally, the board decoupling capacitor is large, about 10 mF or greater, and designed for use in special cases.
Designing in a decoupling capacitor is a two-step process. First, calculate the capacitor value as determined by the electrical requirements. Then, place the part on the pc board. Specifically, how far from the digital chip can a capacitor be placed? Often the pc board itself is overlooked as part of the decoupling design. This article ex-plains where the board fits into the decoupling design process.
The Need For Decoupling: Basically, a power source supplies digital chips with energy via a conductor that links the two. This source may be located "far" from the chip. Designs with 5 in. of 16-AWG wire and 4 in. of 20-mil trace aren't rare. The conductors have resistance, capacitance, and inductance that affect the quality of the energy delivered to the part. The last item, the inductance, is proportional to the conductor's length and causes the most quality problems.
Of critical concern is the layout because it determines the total inductance and the loop area around which current flows. This loop area can, and probably will, radiate electromagnetic interference (EMI).
Placing a small power supply (like a capacitor) next to the chips minimizes the trace length from the capacitor to the chips' Vcc pin and back, shrinking the current's loop area. This in turn minimizes the voltage drop problem caused by the inductance in the conductors. Because the loop area is minimized, EMI also is reduced.
Connecting a digital chip, U1, directly to the supply means dealing with perhaps several inches of trace. Instead, capacitor C1, with its parasitic elements, L2 and R2, is inserted in the circuit "close" to the chip, less than an inch away (Fig. 1). Element L3 is the wiring inductance between C1 and U1. L1 and R1 are the parasitic elements of the conductor from the power supply to the capacitor.
Now the trace length is reduced to mils, and line impedance is reduced as much as practicable. C2, a key player here, determines how much current must be supplied from the power supply. This part represents U1's internal load and the external loads U1 must drive. When S1 closes, these loads are connected to the power supply, and they all demand current immediately.
Note that inductance is the primary contributor to the impedance between the power supply and the switch. For example, the resistance, capacitance, and inductance for a 10-mil wide trace are about 0.02 Ω/in., 2 pF/in., and 20 nH/in., respectively. These are typical numbers for most traces (microstrip and stripline) and wiring used in manufacturing pc boards. Above about 100 kHz, the inductive impedance, jΩl, is the dominant impedance.
Therefore, adding C1 accomplishes two things. It reduces the wiring inductance between the chip and the source of power necessary during switching. This prevents V1, the Vcc voltage to U1, from going below the value needed for proper circuit operation. Moreover, it reduces the loop area that the high-frequency currents flow around and the resulting EMI.
So, the capacitor keeps V1 up, but how high is necessary? This concern focuses chiefly on a part's noise margin, i.e., the minimum voltage noise margin, VNMmin, that can exist and still allow proper circuit operation. (This can be a little tricky to compute because the actual value depends on the semiconductor's noise margin. That somewhat depends proportionally on the power-supply voltage.) From Figure 1, proper operation means fulfilling the condition:
VNMmin ≥ VPS — VZmax (1)
In this illustration, VZmax is dropped wholly across L3.
The current, I, also needs to be examined. Simply stated, this is the current requested by the digital inputs, and the designer must ensure its supply. Because this is the maximum current required, it's labeled Imax. Therefore, the maximum impedance, Zmax, between the power supply and the switch can be no more than:
|Zmax| ≥ (VZmax/Imax) (2)
Recall that the trace length from source to chip was 5 in. of 16-AWG wire and 4 in. of 20-mil trace, yielding about 100 nH of inductance. At some frequency, f, the inductive impedance will be greater than the allowed Zmax that can be tolerated. This frequency is found by shuffling the equation for an inductor's impedance to give:
fmax = |Zmax|/2πL (3)
Above this frequency, C1 can't provide enough voltage to meet the part's required noise margins, and information can't be successfully transmitted.
Equation 10 is missing neither is their an equation listing.
shivaji -April 11, 2006
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