NPU Development Simplified Network-processor unit (NPU) development isn't an easy task, but Consystant's Strata NP 3.0 simplifies the job with graphical designs that lift developers above the fray of low-level coding. Strata NP supports Intel's IXP2400 and IXP2800 NPUs. It also is integrated with Intel's development tools, including the cycle-accurate simulator that handles low-level development. Designers start using Strata NP by dragging and connecting building blocks together, such as packet filtering and routing. Cycle-accurate simulation provides feedback about blocks and packet processing as shown in the figure. This can highlight problems, like dependencies, that are making packet processing times too long. Strata NP 3.0 pricing begins at $25,000 per seat. www.consystant.com
NVisual DSP++ Plug-In Targets Tiger Sharc BittWare Target is a plug-in for Analog Devices' (www.analog.com) VisualDSP++ debugger. It lets the debugger communicate directly with BittWare's Tiger family of DSP boards on ADSP-2106x and 2116x Sharc DSPs. The interface is faster than JTAG and supports multiple DSPs and boards. It doesn't require instrumented code and has a memory footprint that takes up only two quadwords of memory. BittWare Target for TigerSharc is available now with prices starting at $1495. www.bittware.com
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