Using an improved I/O buffer information specification (IBIS) model generation technology, Fairchild Semiconductor International is offering enhanced reliability for simulation results and more dependable real-world correlation for its low-voltage differential signaling (LVDS) interface IC portfolio.
LVDS devices are used in multiple backplane and interconnect applications in communications, computing, and consumer equipment. Providing high-speed interconnect, they're key in achieving system bandwidth. These applications require highly accurate correlation of models to actual system performance.
Due to the differential nature of LVDS I/O, existing IBIS model generation techniques fail to account for the interdependence of the complementary output structures. The new modeling methodology adds biasing elements external to the LVDS device in HSPICE models to ensure consistent operating conditions for each of the complementary outputs. Data is taken under these conditions to derive the IBIS model.
The new LVDS IBIS models are freely available from Fairchild's EnSigna Lab and EnSigna Web. For more information, contact Fairchild's Customer Response Group at (888) 522-5372, or visit www.fairchildsemi.com.
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