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[Forefront]
Self-Adaptive Silicon Boosts 14-Bit DAC's High-Frequency Performance

Staff  |   ED Online ID #2219  |   May 27, 2002


Aiming to attract developers of system-on-a-chip (SoC) solutions for broadband communications, Impinj has unveiled a 300-Msample/s digital-to-analog converter (DAC) development platform. The 14-bit DAC chip on this development board, the IPJ8114E, is the first fruit of the company's proprietary self-adaptive silicon technology. It's implemented in a 0.25-µm logic CMOS process.

While standalone chips are also in the works, Impinj's strategy is to get the technology in the hands of the SoC developers first. The IPJ8114E includes Xilinx Virtex E series FPGAs, voltage regulators, a differential amplifier, clock distribution circuitry, an RF transformer, a serial PROM, and a JTAG interface.

Measured with a third-generation wideband-CDMA signal, the DAC's adjacent-channel power ratio (ACPR) is better than 73 dB for a 74.88-MHz output frequency sampled at 199.68 Msamples/s. For a 307.2-MHz output and a 245.76-Msample/s rate, the ACPR is 69 dB. The SFDR remains above 70 dB to 100 MHz with a 250-Msample/s frequency. Plus, the IPJ8114E offers on-chip calibration to lower INL to ±0.35 dB. It dissipates only 55 mW at a 10-mA output current and maximum speed.

The DAC chip's die area is nearly 30 times smaller than a typical 14-bit device. Intended for mixed-signal system prototyping, the IPJ8114E development platform costs $695 with a 20-kgate FPGA on board or $995 with a 190-kgate FPGA.

Impinj Inc., www.impinj.com; (206) 517-5300


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