Designers can incorporate an array of peripherals into asics and platform systems-on-a-chip. but custom designs have very high upfront costs, making them practical only when chip production runs are counted in the millions. Reconfigurable SoCs, however, have minimal upfront costs, providing developers with an alternative to custom SoCs and standard processors with external peripherals.
Reconfigurable SoCs are sometimes called platform FPGAs. While some products incorporate conventional FPGAs, a number of other options permit reconfigurable custom peripherals by employing specialized building blocks. All result in a chip with a standard CPU core that uses custom peripherals.
This reconfigurable approach offers significant advantages. It reduces design costs because changes can be made immediately to the chip during development. Chip simulation becomes less of an issue because the real hardware is available immediately. In the field, bug fixes and upgrades can be more extensive as significant portions of the hardware can be altered, not just the application code. Finally, reconfigurable systems open up design options.
For example, an MP3 player/recorder doesn't usually operate in both modes at the same time, and the support hardware for playback and recording differ. A reconfigurable system can set up a block of logic to handle MP3 decoding for playback and change this block into an encoder once the device has been set up for recording.
The main disadvantage is cost. Often, the reconfigurable portion of a chip is much larger than the fixed components, such as the processor core or built-in peripherals, increasing chip prices. So reconfigurable SoCs are used in final products when the number of units sold is low, or the cost of the chip is a small fraction of the product price. They also are popular for prototyping because the core CPU and fixed peripherals are well defined. Building a custom ASIC or SoC based on a reconfigurable prototype is relatively easy.
Reconfigurable systems aren't new, but alternatives like large FPGAs tend to be more expensive than some others (see "FPGAs? Yes... Maybe," above). Additionally, FPGAs can find it hard to compete with a fixed-CPU implementation because the FPGA must provide more general logic support. This makes a fixed device considerably smaller in size and lower in cost. The fixed device can also be better optimized for speed and power consumption.
Reconfigurable systems shouldn't be confused with configurable processor designs like those available from ARC and Tensilica (see "Custom CPUs Are Not Reconfigurable," p. 54). They also differ from Ubicom's SX 50/75 MIPS Communications Controller, which uses Virtual Peripherals. In this case, designers trade off CPU performance for peripheral support by emulating hardware logic in software and toggling I/O ports directly. Basic analog devices can be simulated using external hardware.
Designing a system for an FPGA is no simple matter, especially when it comes to CPUs. Developers implementing reconfigurable SoC solutions limit the custom configuration by keeping the CPU design fixed and frequently using some standard peripherals.
For these reasons, reconfigurable SoCs are popular with developers. With numerous reconfigurable chips on the market, a range of applications is covered (see the table). Examples of these chips include Altera's Excalibur, QuickLogic QuickMIPS, Cypress PSoC (Programmable System on a Chip), Triscend A7 and E5, Atmel's FPSLIC (Field-Programmable System-Level IC), and Xilinx's Virtex II Pro. QuickMIPS and Virtex II Pro address networking and communication, with QuickMIPS working well in routers/gateways. Virtex II Pro, with its high-speed serial links, targets higher-end equipment.
The Atmel FPSLIC, Cypress PSoC, and Triscend E5 target microcontrollers. They all have 8-bit processor cores, and only the E5 doesn't incorporate on-chip flash memory. The Triscend A7 packs an ARM7 processor with a peripheral architecture that's almost identical to its little brother, the E5. ARM processors are very popular in portable applications, and the A7 delivers this support with reconfigurable peripherals.
A more detailed examination of each product highlights their differences and features. In general, each has one or more fixed CPU cores. JTAG debug support is popular. RAM, flash, and fixed peripherals are optional. Devices without flash typically result in a two-chip solution. The amount of flash memory is based on application requirements.
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