The HARDI ASIC prototyping system (HAPS) promises real-time speed, real-time debugging, and full ASIC functionality for ASIC prototypers. Version 2.1 of HAPS offers higher capacity and 50% more user I/O than earlier versions. Up to 8 million ASIC gates can run at over 200 MHz on a single board. Larger designs can be accommodated by stacking boards.
HAPS 2.1 addresses critical issues that pertain to the prototyping board design, including crosstalk, signal integrity, impedance matching, connectivity problems, and more. Taking these issues off the table gives designers more time to spend on the design rather than the vehicle for the prototype.
Contained within the HAPS 2.1 system is all of the functionality needed for ASIC prototyping, including FPGAs for implementing ASIC logic, connectors for adding intellectual-property blocks, high-speed clock nets, configurable connectivity for partitioning, and more. Using up to four Xilinx Virtex-II devices, designers can implement large and complex ASIC designs.
The board can be enclosed in a cabinet with power-supply and cooling fans, making for a fully portable, standalone system. It fully supports Xilinx's ChipScope and Synplicity's Identify for real-time debugging. Drivers for Synplicity's Certify are also provided. Pricing for HAPS starts at $11,900.
HARDI Electronics AB (+46) 46-16 29 00 • www.hardi.com
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