How About A One- Or Two-Cycle, 25-MHz 8051? The 8051 just keeps on going like the Energizer Bunny. Architects continue tuning up the chip to keep it competitive. One of the latest riffs is Cygnal's c8051F2xx and 3xx microcontrollers (mCs). These mCs run a hopped-up 8051, which has been recast as a one- or two-cycle CPU (the original 8051 took 12 cycles/instruction). Over 70% of the instructions execute in one or two cycles. These mCs run at 20 or 25 MHz, delivering a powerful CPU and peripherals combination. The C8051F2xx and F3xx are the latest family members in Cygnal's 8051 stable. Designed for lower-cost applications, they have less memory and smaller peripheral sets.
The C8051F2xx and 3xx come with 8 kbytes of on-chip flash memory, which can be reprogrammed dynamically in a target system. The chips have up to 1280 bytes of RAM for registers and data. Peripherals include a UART and SPI serial interface, three 16-bit 8051-style timers, a watchdog timer, and 32 I/Os. Additionally, some versions are available with a 100-ksample/s, 8-bit ADC. For ADC-equipped chips, any of the 32 I/Os can be configured as an analog input. The controllers support on-chip JTAG emulation. The mCs come in a 48-pin TQFP package with prices starting at $4.42 (1000).
SoC Integrates 20-MHz 8-Bit CPU, Peripherals, 10k FPGA Gates The dividing line between an mC and an SoC is getting harder and harder to define, especially as configurable logic becomes a mainstream ASSP component. Atmel's FPSLIC AT94K10 is a good case in point—mC or SoC? It integrates a high-performance AVR 8-bit CPU with a standard set of mC peripherals, on-chip RAM, and 10k FPGA gates. These dynamically reprogrammable gates can be loaded from on- or off-chip memory under processor control. The configurable logic, which has embedded math units, enables designers to build their own logic or compute elements. The resultant combination is a bit more than an mC and easily qualifies as a low-end SoC.
The FPSLIC comes with a 20-MIPS CPU, which has an 8- by 8-bit multiplier. The CPU is supported with 36 kbytes of 15-ns, dual-ported SRAM, and 10k SRAM-based FPGA gates. On-chip peripherals include two UARTs, three counter/timers, and a watchdog timer. The chip is designed for low power dissipation: 50 mA in standby and 2 to 3 mA/MHz in active mode. Prices begin at $9.95 (250,000).
Atmel (408) 441-0311; www.atmel.com
Add FPGA Power To DSP, PowerPC Boards Many board applications need high-speed line processing to supplement their on-board DSP or PowerPC processors. One way to do that is with high-density FPGAs. Pentek supplies the modules and boards to use them to front-end the base DSP or PowerPC processors. The Model 6250, an FPGA VIM-2 module, packs in two Xilinx Vertix FPGAs, each with up to 3M FPGA gates. These VIM-2 modules plug into Pentek VME boards with VIM-2 module sites. VIM-2 is a public processor/DSP module standard developed by Pentek for high-end DSP and RISC processing. The company sells both PowerPC and TI C6x DSP processor boards.
The Model 6250 FPGA VIM-2 modules are front-ended by one or two Front-Panel Data Port (FPDP) interfaces for high-speed connections to off-board peripherals and sensors. The FPDP ports are connected externally through front-panel connectors on the host VME board. Each of the two FPGAs on the module is supported with its own SRAM, two 64K by 16 SRAM chips (expandable to 256K by 16).
These SRAMs can be loaded with incoming, intermediate, or outgoing data, relieving the FPGA of having to store data using its limited RAM resources. The FPGA configurations are loaded from the host processors via the VIM-2 connections. The FPGA densities available are 1M or 3M gates. Prices for the Model 6250 start at $4495.
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