Hi, please help me find a digital delay line 10.7 mhz input/output - 0.1 microsecs to 399 microsecs in 0.1 microsecs step. Thanks.

Sorry for my english !

Hi, I'new here. What about M65830 digital delay circuit? Can someone help me ?

fernando....on the 4013...the clock pins are 3 and 2....on the shift register...it matters what register you will use...as to the pin location.

idont know much electronic, and i dont know english, that it is the clock? that I put? where the terminal clock goes? I would thank the humility of responding me

dont use such low speed clocks...if you use lm111 and my personal preference...a 10 Mhz clock speed....any output jitter and clock feedthough is at such a high rate of speed ..that any audio device hooked down stream can never reproduce it..therefore..no need for filtering of output...it works...i have several units in the field now as ambiance processors...K.I.S.S. certainly works for this circuit.

You clearing did not understand the article

MT-022: ADC Architectures III: Sigma-Delta ADC Basics

http://www.analog.com/en/content/0,2886,760%255F%255F92393,00.html

MT-023: ADC Architectures IV: Sigma-Delta ADC Advanced Concepts and Applications

http://www.analog.com/en/content/0,2886,760%255F%255F92394,00.html

Right that's it, I'll make another post when I've built something :-)

Sorry to keep posting... Another good link I have for development of this idea is

http://www.commsdesign.com/design_corner/showArticle.jhtml?articleID=18402743

It's about RF design rather than audio but the principals are well explained. I always wondered what MASH was. I thought it was just another marketing buzz word but...

I found this

http://www.beis.de/Elektronik/DeltaSigma/DeltaSigma.html

may be we can up the performace by using a 2nd order modulator and better output filter.

In principal this is a great idea even if the performance can never reach that of Crystal, Burr-Brown et al.

Hi Jim,

I'm not sure about this. I think it may be a case of nice try but no cigar. If I’ve missed something and it is true delta sigma, please let me know because I was going to bolt it to some FIFO memory and make a Flanger pedal – I got all excited when I found your idea but…. :-(

If we think about a multi-bit DAC / ADC for a moment each bit is has a power of 2 weighting. So in the case of a 8 bit device the MSB (Most Significant Bit) is worth 50% of the output level, the next is worth 25%, the next 12.5% down to the LSB (Least Significant Bit) being worth 0.39%. In the case of for example a 16-bit DAC its 0.00152587890625%. As most resistors are 1% and 0.1% ones are expensive you will be hard pushed to make a good one (much better than 8bits) out of discrete components as it will need the MSB resistor trimmed to twice this tolerance (halve a bit). Now you can see why multibit DACs are expensive.

Delta Sigma DACs work by successive approximation more or less as described BIG BUT all the bits in each samples approximation have this power of 2 weighting. So, keeping it simple. In the case of an 8 bit DAC, a word of 10101101 is clocked out as 256 clock pulses of 128 x 1 followed by 64 x 0, 32 x 1, 16 x 1, 8 x 1, 4 x 1, 2 x 0 and finally 1 x 1.

The exact way this is done is a bit more complex I think. The manufactures use many clever tricks to increase performance.

Here the resistor tolerance is not critical but the timing is. If you have jitter on your clock pulses you can loose resolution. Thankfully XTALs are very accurate so the DS solution works out less expensive that the multibit.

Using any kind of variable oscillator for effects will seriously muck everything up.

If we look at some of the best audio DACs they are 192kHz 24bit. This would imply a clock frequency of 192000 x 2^24 = 3221225472000 Hz which is clearly crazy so I’m missing some important point here. Anybody know the trick?

Anyhow to get to the point… This circuit has the same weight to each bit. So if you run at say 100kHz we have 100kbps. At say 5kHz bandwidth (telephone quality) this gives us 20 bits per Hz which will give us about 4.4 bits which is quite poor. If we up this to 1 MHz we get 200 bits which is 7.6 bits…

16 bit 44.1kHz, forget it but I'll give it 2/5 as it got me thinking :-)

Jim, I am interested in constructing a stereo image expander (audio delay required) with near CD quality. You mention increasing the clock frequency in your article which I undersatnd. My issue is with the design of the integration time constants and corner frequencies. 10K ohm and 0.01uF yield a corner frequency of 1.5KHz. What are your thoughts? Stephen J Wagner

HI Jim your idea is excellent and smart,but i haven,t tried it yet.before this i want to ask you something.Actually i dont want to build delay line,but a simple audio recorder with MCU,can i store the digital data stream coming at point B and send it back to point D when i want,offcourse with a constant bit rate.please help me and if this possible then what should be the clock rate and sampling rate to get high quality sound.i am new to the digital audio so please help me.........thanks a lot

HI Jim your idea is excellent and smart,but i haven,t tried it yet.before this i want to ask you something.Actually i dont want to build delay line,but a simple audio recorder with MCU,can i store the digital data stream coming at point B and send it back to point D when i want,offcourse with a constant bit rate.please help me and if this possible then what should be the clock rate and sampling rate to get high quality sound.i am new to the digital audio so please help me.........thanks a lot

Audio delay units are readily available at any music store. An early MXR brand unit must have been based on a very similar design. I recall seeing a single 4164 dram and a few other ic's.

Would this circuit be a starting point for a pcm-based digital audio power amplifier for electric bass? Any suggestions?

wonderful circuit....true it would take great amount of memory to provide long delays..but for time alignment of speakers...inside a closed enviornment...such as an automobile....i have found it only necessary for about 4k of fifo memory to do nicely....for each channel of course.

Can someone explain a practical circuit and construction details of a Tremelo unit which could be used to enhance the tonel effect of an electric guitar.

Can someone explain a practical circuit and construction details of a Tremelo unit which could be used to enhance the tonel effect of an electric guitar.

Can someone explain a practical circuit and construction details of a Tremelo unit which could be used to enhance the tonel effect of an electric guitar.

Some people tell me that we can use Charge Couple Device (CCD) to do the delay. Is that true? How to do so?

Please help me design a simple line delay circuit. I want use an enable signal for multiplexer to be delayed before it is being receieved at the demultiplexer.

Excellent idea, but at 100 kHz, a 1-kbyte RAM will only yield up to a .08-second delay, and an addressing system (2- BCD counters, or a PIC w/ on-chip RAM) is necessary. ( I'm thinking of those 8-pin SMT memories.) Of course, a good PIC with 1Meg RAM is nice, but the novelty and simplicity fade. Overall, though, very smart. Thanks.

I would like to have a complete description about how this circuits works. Can you help me? Thanks.

You have explained the Sigma Delta principle outstandingly!

Built this circuit with the correction and it works fine. Use 4517 and 4557 shift registers to delay a 60Hz signal 180 degrees. Nice linearity at 75-100 KHz. clock. Thanks.

Is this a test?

The encode Rx needs to connect to the FF#1 Q output not it's D input. As drawn the comparator will free run oscillate and final output will not be an accurate replica of the input.

Hey, I'm pretty much digitally illiterate so don't laugh at me. I'm looking to construct a circuit that will delay a radio broadcast to sync up with tv. Will this work? Do I need a computer to provide the clock input for the D flip flop or is there something simple and cheap I can do? Also, despite your answere to Chuck's delay question, I'm still not clear on how to control the delay time. I would like this to be adjustable with some kind of input knob or something. Any ideas?

I'm new to digital and the delay time is not obvious to me. How would one change the delay, and what range of delay is available with this simple circuit?

A delay line is a shift register. A Shift registers are FIFOs First in, First out electronic arrays. They are available up to 128 bits on a chip. For longer delays, a memory device, PROM, ROM, EEPROM, or other digital sotrage media would work best. I hope this helps...... Jim Walker

Hi, what shift register should I use? After the D flip flop? Thank you very much.--Juan

Literaly any shift register is fine. Note, there was a type, the Rx on the left of the schematic that should connect to the D-flop Q out, not the comparator out.--Jim