John Nieto
Write for Electronic Design
  John Nieto is a senior applications engineer with Inphi Corp., Westlake Village, Calif. He has more than seven years of experience with digital logic and PLLs and has written several papers on PLL applications. He holds a BSEE from the University of California, San Diego.
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April 24, 2008   [Engineering Essentials]
DDR3’s Impact on Signal Integrity
Applications demanding higher system bandwidth and lower power, such as converged notebooks, desktop PCs, and servers, continue to drive the evolution of industry standards, including DDR3 as defined by JEDEC. The latest DDR3 memory standard, JEDEC JESD79-3A, specifically supports these needs and the requirements of emerging dual and multicore processor systems. DDR3 differs from the well-established DDR2 standard in several areas, such as data rate, operating voltage, and logic....










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