[Technology Report] EDA Lays A Foundation For The Nanometer Age
As ASIC, ASSP, and SoC designers squint down the road past 100-nm feature sizes, they can make out a world in which their tried-and-true assumptions about the design process are severely challenged. For one, the process will begin above RTL with...
—
David Maliniak
[Leapfrog: Industry First] ADCs Look To Bring HDTV To U.S. Cell Phones
HDTV on a 2-in. screen? Such a concept may challenge North American readers as the ultimate example of putting 10 pounds of goods in a five-pound sack. But Europeans, more accustomed to public transit and consistent phone and digital broadcast...
—
Don Tuite
[Editorial] Surviving The Hurricanes: Trials Of Life Without Power
As I write this, our technical editor Bob Milne is evacuating from his home in Edgewater, Fla., racing ahead of Hurricane Frances. We hope that Bob and all of his fellow Floridians got out on time, in front of Frances' fury. But evading the storm...
—
Mark David
[POV: Point Of View] Full-System Simulation: Escape From Reality
A major transformation in complex system-level design is under way, as ever-increasing numbers of electronic systems are being implemented as software. The critical progression for the delivery of a typical working system has moved away from...
—
Peter S. Magnusson
[Pease Porridge] Bob's Mailbox
Dear Bob: There's an error in your recent "Mailbox."* What you "heard" about the 555 timer is a bit off the mark. Your story mixed up the 555 with my work on semicustom ICs, which happened about the same time. If you want the...
—
Bob Pease
[TechView: The Industry] Workshop Aids Grant Seekers
A two-day workshop for engineers seeking federal funding will teach entrepreneurs how to "read between the lines" of government solicitations to win Small Business Innovative Research (SBIR) grants. "SBIR Grants for the Curious Engineer in Business"...
—
John Novellino
[TechView: Analog & Power] Versatile HDD Preamp Can Take On Many Roles
A low-power preamp for mobile notebook hard-disk drives (HDDs) lets manufacturers offer as much storage capacity in 2.5-in., 7200-rpm drives as is found in today's desktop PCs--without a battery-life penalty. Agere's PA7700 brings read/write speeds...
—
Don Tuite
[TechView: Communications] Wireless Apps Amp It Up With E-pHEMT
Designated the MGA-425P8, Agilent's enhancement-mode pseudomorphic high-electron mobility transistor (E-pHEMT) power amplifier targets wireless equipment operating up to 10 GHz. This monolithic microwave IC (MMIC) can be used in 802.11a/b/g wireless...
—
Louis E. Frenzel
[TechView: Embedded] Tiny CompactFlash-Based System Runs uClinux
System-on-modules and compact motherboards attempt to provide computing solutions, but often with a proprietary form factor. CData Solutions takes the standards route even to the point of placing a Freescale Coldfire microcontroller into a...
—
William Wong
[TechView: Embedded] News Clips
Dual-Processor SoC Streamlines Secure VoIP Designs Secure voice over Internet protocol (VoIP) requires IPsec support like that found in Renesas' 200-MHz, 32-bit SH7710 system-on-a-chip (SoC). The SH7710 also includes an SH3-DSP CPU core to handle...
—
William Wong
[TechView: Embedded] Ada Gets Eclipsed IDE
It was bound to happen. ADA developers can now take advantage of the eclipse integrated development environment (IDE). Aonix's Ada Development Toolkit, AonixADT, integrates the Ada compiler support from the company with the open-source Eclipse...
—
William Wong
[TechView: Components & Test] Go Modular With High-Resolution Encoders
A "one-size-fits-all" solution describes the AEDA-3200 series of three-channel, high-resolution, ultra-miniature incremental optical encoder modules. These plug-and-play modules meet the requirements of general-purpose housed encoders and integrated...
—
Roger Allan
[TechView: Digital] Next-Generation Search Engine Hastens IPv6 Operations
A fourth-generation network-search-engine (NSE) architecture accelerates Internet Protocol version 6 (IPv6) operations and enables value-added services in 10-Gbit/s applications. Initial products based on this architecture, developed by Integrated...
—
Dave Bursky
[TechView: Digital] Core Offers A Double Dip Of Security And Compression
Available as a block of intellectual property from iTop Corp., the PCISAAC (PCI secured and accelerated/compressed) processor combines a PCI interface, LZW (Lempel Ziv Welch) compression and decompression, and AES (advanced encryption standard)...
—
Dave Bursky
[TechView: EDA] ESL Tools Analyze, Optimize CPU-Based Designs
Automating the process of optimizing and accelerating processor-based designs, the Triton tool suite from Poseidon Design Systems is based on a SystemC software and hardware co-simulation environment. Furthermore, the suite employs transaction-level...
—
David Maliniak
[TechView: EDA] Linter Is First To Support SystemVerilog Standard
Basic rule-checking capabilities for all SystemVerilog 3.0 design constructs are now available in the nLint tool. Continuing to drive support for the Accellera SystemVerilog standard, nLint enables early detection of design problems in IC development...
—
David Maliniak
[TechView: EDA] EDA Roundup
Co-simulation of electrical and mechanical systems is made possible by integrating Cadence's PSpice technology with Matlab and Simulink products from the Mathworks. The PSpice SLPS interface for Cadence's OrCAD products creates a simulation...
—
David Maliniak
[TechScope] Moore's Law Marches Forward
Going one more with Moore's. That's the case with a 70-Mbit static random-access-memory (SRAM) chip packed with over 500 million transistors. Using 65-nm technology, this chip from Intel features gates that measure 35 nm with a 1.2-nm gate oxide...
—
Richard Gawel
[TechScope] Underdog Robot Takes Underwater Competition
The field included MIT and other seasoned specialists in engineering and marine technology. Yet Carl Hayden High School, a rookie team from the deserts of Phoenix, Ariz., grabbed first place in the Explorer class of the Third Annual ROV Design and...
—
Richard Gawel